mitsubishi PM50RSD060 flat-base type insulated package sep. 2001 mitsubishi PM50RSD060 flat-base type insulated package PM50RSD060 feature a) adopting new 4th generation planar igbt chip, which per- formance is improved by 1 m fine rule process. for example, typical v ce (sat)=1.7v b) using new diode which is designed to get soft reverse recovery characteristics. c) keeping the package compatibility. the layout/position of both terminal pin and mounting hole is same as s-series 3rd generation ipm. ?3 50a, 600v current-sense igbt for 15khz switching ? 15a, 600v current-sense regenerative brake igbt ? monolithic gate drive & protection logic ? detection, protection & status indication circuits for over- current, short-circuit, over-temperature & under-voltage (p-fo available from upper leg devices) ? acoustic noise-less 3.7kw class inverter application application general purpose inverter, servo drives and other motor controls package outlines dimensions in mm pbt 19 18 17 16 15 14 13 12 11 9 10 78 6 5 4 3 2 1 bpn wvu a mounting holes screwing depth min9.0 10 12 19- 0.5 31.6 2- 2.54 32.6 110 1 95 0.5 24.5 17.5 0.5 0.3 3.22 2 0.5 17 74 0.5 89 1 4 19.4 66.44 22 4.5 26 26 20 20 17.02 10 10 3-2 4-r6 6-m5nuts 4- 5.5 6-2 3-2 3-2 10 label 10.6 11.6 1.6 3.22 3-2 2.54 22 21.2 C 0.5 +1.0 0.5 terminal code 1. vupc 2. ufo 3. up 4. vup1 5. vvpc 6. vfo 7. vp 8. vvp1 9. vwpc 10. wfo 11. wp 12. vwp1 13. vnc 14. vn1 15. br 16. un 17. vn 18. wn 19. fo a : detail
mitsubishi PM50RSD060 flat-base type insulated package sep. 2001 v ces i c i cp p c t j collector-emitter voltage collector current collector current (peak) collector dissipation junction temperature v d = 15v, v cin = 15v t c = 25 c t c = 25 c t c = 25 c v a a w c maximum ratings (tj = 25 c, unless otherwise noted) inverter part symbol parameter condition ratings unit 600 50 100 125 C 20 ~ +150 rfo=1.5k ? w p v wp1 v wpc u n br fo bnwvp u v p v vp1 v vpc u p v up1 v upc w n v n1 v nc v n gnd in fo vcc gnd si out u fo w fo v fo rfo rfo rfo rfo th gnd in fo vcc gnd si out gnd in fo vcc gnd si out gnd in fo vcc gnd si out gnd in fo vcc gnd si out gnd in fo vcc gnd si out gnd in fo vcc gnd si out internal functions block diagram v ces i c i cp p c v r(dc) i f t j brake part collector-emitter voltage collector current collector current (peak) collector dissipation fwdi rated dc reverse voltage fwdi forward current junction temperature v d = 15v, v cin = 15v t c = 25 c t c = 25 c t c = 25 c t c = 25 c t c = 25 c v a a w v a c symbol parameter condition ratings unit 600 15 30 52 600 15 C 20 ~ +150 v fo i fo control part v ma 20 20 supply voltage input voltage fault output supply voltage fault output current symbol parameter condition ratings unit applied between : v up1 -v upc v vp1 -v vpc , v wp1 -v wpc , v n1 -v nc applied between : u p -v upc , v p -v vpc w p -v wpc , u n ? v n ? w n ? b r -v nc applied between : u fo -v upc , v fo -v vpc , w fo -v wpc f o -v nc sink current at u fo , v fo , w fo , f o terminals 20 20 v d v cin v v
mitsubishi PM50RSD060 flat-base type insulated package sep. 2001 parameter symbol supply voltage protected by oc & sc supply voltage (surge) module case operating temperature storage temperature isolation voltage condition v cc(surge) t c t stg v iso ratings v cc(prot) 400 500 C 20 ~ +100 C 40 ~ +125 2500 unit v c c v rms v v d = 13.5 ~ 16.5v, inverter part, t j = 125 c start applied between : p-n, surge value or without switching (note-1) 60hz, sinusoidal, charged part to base, ac 1 min. (note-1) tc measurement point is as shown below. (base plate depth 3mm) total system pbt bpn wvu tc 64mm C i c = 50a, v d = 15v, v cin = 15v (fig. 2) 2.3 2.3 3.3 2.4 0.3 1.0 3.3 1.2 1 10 min. typ. max. collector-emitter saturation voltage collector-emitter cutoff current electrical characteristics (tj = 25 c, unless otherwise noted) inverter part parameter symbol test condition v ce(sat) i ces v ec t on t rr t c(on) t off t c(off) limits 0.8 1.7 1.7 2.2 1.2 0.15 0.4 2.4 0.6 t j = 25 c t j = 125 c fwdi forward voltage switching time v d = 15v, v cin = 15v ? 0v v cc = 300v, i c = 50a t j = 125 c inductive load (upper and lower arm) (fig. 3) v ce = v ces , v cin = 15v (fig. 4) v d = 15v, i c = 50a v cin = 0v, pulsed (fig. 1) v ma v s unit t j = 25 c t j = 125 c c/w r th(j-c)q r th(j-c)f r th(j-c)q r th(j-c)f r th(j-c )q r th(j-c )f r th(j-c )q r th(j-c )f r th(c-f) symbol test condition unit limits thermal resistances (note-2) t c measurement point is just under the chips. if you use this value, r th(f-a) should be measured just under the chips. min. typ. max. inverter igbt part (per 1 element), (note-1) inverter fwdi part (per 1 element), (note-1) brake igbt part, (note-1) brake fwdi part, (note-1) inverter igbt part (per 1 element), (note-2) inverter fwdi part (per 1 element), (note-2) brake igbt part, (note-2) brake fwdi part, (note-2) case to fin, thermal grease applied (per 1 module) 1.00 2.50 2.40 3.86 0.82 1.51 1.72 2.87 0.027 parameter junction to case thermal resistances contact thermal resistance
mitsubishi PM50RSD060 flat-base type insulated package sep. 2001 i f = 15a (fig. 2) 3.5 3.5 main terminal screw : m5 mounting part screw : m5 symbol parameter mounting torque mounting torque weight test condition unit n ? m n ? m g limits min. typ. max. 2.5 2.5 3.0 3.0 560 mechanical ratings and characteristics v ce(sat) i ces v fm v ma min. typ. max. v collector-emitter saturation voltage fwdi forward voltage collector-emitter cutoff current unit parameter symbol test condition limits 2.5 2.6 3.0 1 10 1.8 1.9 2.0 t j = 25 c t j = 125 c brake part v d = 15v, i c = 15a v cin = 0v, pulsed (fig. 1) v ce = v ces , v cin = 15v (fig. 4) t j = 25 c t j = 125 c v d = 15v, v cin = 15v applied between : u p -v upc , v p -v vpc , w p -v wpc u n ? v n ? w n ? b r -v nc i d 60 18 1.8 2.3 220 180 125 12.5 0.01 15 ma circuit current input on threshold voltage input off threshold voltage over current trip level short circuit trip level over current delay time over temperature protection supply circuit under-voltage protection fault output current minimum fault output pulse width v th(on) v th(off) oc sc t off(oc) ot ot r uv uv r i fo(h) i fo(l) t fo trip level reset level trip level reset level control part 1.2 1.7 109 65 18 111 11.5 1.0 parameter symbol test condition max. min. typ. unit limits 44 13 1.5 2.0 128 26 132 39 10 118 100 12.0 12.5 10 1.8 (note-3) fault output is given only when the internal oc, sc, ot & uv protection. fault output of oc, sc and uv protection operate by upper and lower arms. fault output of ot protection operate by lower arm. fault output of oc, sc protection given pulse. fault output of ot, uv protection given pulse while over level. base-plate temperature detection, v d = 15v C 20 t j 125 c v d = 15v, v fo = 15v (note-3) v d = 15v (note-3) v s v n1 -v nc v xp1 -v xpc t j = C 20 c t j = 25 c t j = 125 c inverter part brake part a a inverter part v d = 15v (fig. 5,6) break part C 20 t j 125 c, v d = 15v (fig. 5,6) C 20 t j 125 c, v d = 15v (fig. 5,6) v d = 15v (fig. 5,6) c v ma ms recommended conditions for use recommended value unit test condition symbol parameter v applied across p-n terminals applied between : v up1 -v upc , v vp1 -v vpc v wp1 -v wpc , v n1 -v nc (note-4) applied between : u p -v upc , v p -v vpc , w p -v wpc u n ? v n ? w n ? b r -v nc using application circuit input signal of ipm, 3 sinusoidal pwm vvvf inverter (fig. 8) for ipm s each input signals (fig. 7) supply voltage control supply voltage input on voltage input off voltage pwm input frequency arm shoot-through blocking time 400 15 1.5 0.8 4.0 20 2.5 v cc v cin(on) v cin(off) f pwm t dead v d v khz s v (note-4) allowable ripple rating of control voltage : dv/dt 5v/ s, 2v p-p
mitsubishi PM50RSD060 flat-base type insulated package sep. 2001 precautions for testing 1. before appling any control supply voltage (v d ), the input terminals should be pulled up by resistores, etc. to their corre- sponding supply voltage and each input signal should be kept off state. after this, the specified on and off level setting for each input signal should be done. 2. when performing oc and sc tests, the turn-off surge voltage spike at the corresponding protection operation should not be allowed to rise above v ces rating of the device. (these test should not be done by using a curve tracer or its equivalent.) 10% 90% trr irr tr td (on) tc (on) tc (off) td (off) v cin ic v ce 10% 10% 10% 90% tf (ton= td (on) + tr) (toff= td (off) + tf) v d (all) u,v,w, (n) p, (u,v,w,b) a pulse v ce v cin (15v) v d (all) u,v,w, (n) p, (u,v,w,b) v cin v cc i c i c i c oc sc v cin t off (oc) u,v,w n v cinn v cinp v d v d p ic vcc v cinn 0v 0v v cinp t t t dead t dead t dead p, (u,v,w,b) u,v,w, (n) u,v,w,b, (n) v d (all) in fo fo fo in fo v d (all) v cin (0v) ic v v p, (u,v,w) v cin (15v) C ic p n n c s c s u,v,w vcc vcc ic ic v d (all) v d (all) p u,v,w v cin v cin v cin ( 15v ) v cin ( 15v ) fo fo in fo in fo short circuit current over current constant current constant current fig. 7 dead time measurement point example fig. 3 switching time test circuit and waveform fig. 1 v ce(sat) test fig. 2 v ec , (v fm ) test a) lower arm switching b) upper arm switching fig. 4 i ces test fig. 5 oc and sc test fig. 6 oc and sc test waveform signal input (upper arm) signal input (lower arm) signal input (upper arm) signal input (lower arm)
mitsubishi PM50RSD060 flat-base type insulated package sep. 2001 notes for stable and safe operation ; ? design the pcb pattern to minimize wiring length between opto-coupler and ipm s input terminal, and also to minimize the stray capacity between the input and output wirings of opto-coupler. ? quick opto-couplers: tplh, tplh 0.8 s. use high cmr type. the line between opto-coupler and intelligent module should be shortened as much as possible to minimize the floating capacitance. ? slow switching opto-coupler: recommend to use at ctr = 100 ~ 200%, input current = 8 ~ 10ma, to work in active. ? use 4 isolated control power supplies (v d ). also, care should be taken to minimize the instantaneous voltage charge of the power supply. ? make inductance of dc bus line as small as possible, and minimize surge voltage using snubber capacitor between p and n terminal. ? use line noise filter capacitor (ex. 4.7nf) between each input ac line and ground to reject common-mode noise from ac line and improve noise immunity of the system. out si gnd gnd in vcc u v w b n p m if + C : interface which is the same as the u-phase out si gnd gnd in vcc out si gnd gnd in vcc out si gnd gnd in fo fo fo fo vcc out si gnd gnd in fo temp vcc out si gnd gnd in fo vcc vwp1 wp vwpc th un vn vn1 wn vnc rfo rfo rfo rfo fo vvp1 vp vvpc 0.1 4.7k 1k 0.1 0.1 20k 20k 20k 10 10 10 20k 10 0.1 vfo wfo ufo vup1 up vupc br if if if 5v out si gnd gnd in fo vcc v d v d v d v d fig. 8 application example circuit
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